1. Field of the Invention
The present invention relates to a data conversion circuit for converting a component array, etc. of image data in an image processing device such as a digital camera.
2. Description of the Related Art
FIG. 44 is a block diagram that shows a schematic construction of a digital camera. In this digital camera, light that has passed through an optical system 500 is detected by a CCD image-pickup element 501 and converted to an analog signal. An analog signal processing unit 502 subjects the analog signal inputted from CCD image-pickup element 501 to a gain adjusting process and an A/D converting process so as to generate a digital signal (Raw Image Data), and outputs this signal to an image processing unit 503. An image processing unit 503 has subjected the raw image data to digital image processing such as a pixel interpolating process, an edge emphasizing process and a color space converting process and outputs processed data. And the processed data are transferred to a buffer area in a main memory 506, and stored therein. A CPU 507 carries out controlling processes so that the image data stored in the buffer area are read out to be subjected to a software process, and the read-out image data are compressed and encoded in a compression-expansion processing unit 510 to be recorded in an IC memory through a card interface 508. Here, CCD image-pickup element 501 is driven by a CCD driving unit 504. Moreover, a timing generator 505 generates signals for adjusting operation timings of CCD image-pickup sensor 501, analog signal processing unit 502 and image processing unit 503, and supplies these signals thereto.
Moreover, this digital camera is provided with two kinds of display devices that electronically display picked-up image data. One of these is an LCD (Liquid Crystal Display) device 511 having a comparatively large screen that is placed on a back face, etc. of a digital camera, and the other is an electronic view finder 514 (hereinafter, referred to as EVF) that is attached to an eye piece portion of a digital camera. A color field sequential display, which displays one frame in a color field sequential format, is used as a color field sequential display. In this application, each “field” consists of plural color pixels in a dot sequential format, and each “color field” consists of only single-color pixels in a color field sequential format. The user is allowed to select either one of the display devices by operating a switching button (not shown), etc., placed on the digital camera. When image data are displayed on these display devices as motion images, CPU 507 carries out controlling processing so as to successively output image data with a low resolution from image processing unit 503, and transfers the image data to a display signal processing unit 509 through a bus 515. When motion images are displayed on LCD device 511, display signal processing unit 509 converts the image data to picture signals such as analog RGB signals, and outputs the resulting signals to LCD device 511. LCD device 511 displays motion images by driving a liquid crystal panel and a backlight based upon the inputted picture signals. And, picture signals, outputted from display signal processing unit 509, can be transferred to an external TV monitor through a cable 512, and displayed as motion images.
When motion images are displayed on EVF514, display signal processing unit 509 transfers image data inputted through bus 515 to a data conversion circuit 513. Three primary color components of R (red), G (green), B (blue) per pixel, or three components of Y (luminance component), Cb (color difference component), Cr (color difference component) per pixel, are outputted from image processing unit 503 in a dot sequential format, and data conversion circuit 513 converts data in a dot sequential format (hereinafter, referred to as dot sequential data) formed by arranging respective components of transferred image data on a pixel basis to data in a color field sequential format (hereinafter, referred to as color field sequential data) that are arranged on a frame basis, and outputs the resulting data to EVF514. FIG. 45 is an explanatory drawing that schematically shows image data in a dot sequential format of R, G, B. As shown in this Figure, one frame is transferred in the order of R[0, 0], G[0, 0], B[0, 0], R[1, 0], G[1, 0], B[1, 0], . . . , R[i, j], G[i, j], B[i, j] . . . , R[w−1, h−1], G[w−1, h−1], B[w−1, h−1] (i: horizontal pixel number, j: horizontal line number). Moreover, FIG. 46 is an explanatory drawing that schematically shows image data in a color field sequential format of R, G, B. As shown in this Figure, one frame is transferred in the order of R[0, 0], . . . , R[w−1, h−1], G[0, 0], . . . , G[w−1, h−1], B[0, 0], . . . , B[w−1, h−1]. In other words, R field containing only R[0, 0], . . . , R[w−1, h−1], G field containing only G[0, 0], . . . , G[w−1, h−1], and B field containing only B[0, 0], . . . , B[w−1, h−1], are transferred in this order.
A data conversion circuit 513 is provided with a buffer memory having a capacity of at least one frame, and inputted dot sequential data of one frame are stored in the buffer memory, read out in a color field sequential format, and outputted to EVF514 at a high frame rate.
For example, in the case when the dot sequential data are constituted by three components, each color having 8-bits, it is necessary to provide a buffer memory having a capacity of total pixel number×3 bytes. However, in the case when a buffer memory has only the capacity of one frame, during a process in which dot-sequential data are written in the buffer memory, color field sequential data might be read out from the buffer memory. Since EVF514 acquires respective color fields in time series, it is susceptible to a problem, so-called “color breaking” phenomenon, in which a moving subject tends to be displayed at different positions in respective color fields.
FIG. 47 is a schematic explanatory drawing that shows one example of data conversion circuit 513 which converts dot sequential data to color field sequential data. Data conversion circuit 513 successively stores inputted dot sequential pixel data in a frame memory 536, and reads out the stored pixel data with address-specification so as to be outputted in a color field sequential format, and outputs the resulting data. Consequently, data conversion circuit 513 outputs R field 538R consisting of only R component, G field 538G consisting of only G component, and B field 538B consisting of only B component.
However, it has been known that the color field sequential data outputted from the above-mentioned data conversion circuit 513 tends to cause a phenomenon referred to as “color breaking” on EVF514 that is a color field sequential display. This “color breaking” is a phenomenon in which, since a color field sequential display acquires respective color fields in time series, a moving subject is displayed at different positions in respective color fields. Referring to FIG. 48, one example of this phenomenon will be explained. As shown in this Figure, when a subject image 539 having a single white color is changed to a subject image 560 containing a black area 561, it sometimes happens that an R field ends at a writing position L1, while a G field ends at a writing position L2. In this case, in a color field sequential display, the above-mentioned black area 561 is displayed as a first area 561a in which three color components of R, G, B are completely dark, a second area 561b with a red color with only the respective color components of G, B being dark and a third area 561c with a yellow color with only B component being dark, with horizontal line positions L1D, L2D appearing as borders.
Moreover, upon displaying dot sequential data on a display device such as EVF514, when an interlace display is converted to a progressive display, or when a frame is outputted in response to a display speed of the display device, a so-called frame-rate conversion is carried out. However, when the frame rate conversion is carried out using a buffer memory having a capacity of one frame, as shown in FIG. 49, a problem arises in which a so-called “positional offset” phenomenon in which the upper portion 516a and the lower portion 516b of a display image 516 appear with an offset tends to occur.
In order to reduce such phenomena buffer memories having a capacity of 2 frames can be prepared. FIG. 50 is a schematic drawing that shows a data conversion circuit 513 having buffer memories 522A, 522B of 2 frames. In this data conversion circuit 513, a color space conversion circuit 520 converts color space of inputted point-sequential data to RGB space to be outputted. Dot sequential data outputted from this color space conversion circuit 520 are controlled by a writing control unit 521 so as to be written in either one of a first buffer memory 522A and a second buffer memory 522B. Moreover, a reading control unit 523 carries out controlling operations so that, during a period in which dot sequential data are written in either one of buffer memories 522A and 522B, color field sequential data are read from the other buffer memory 522A or 522B at a high frame rate, and outputted to EVF514.
However, in data conversion circuit 513 shown in FIG. 50, buffer memories of 2 frames need to be prepared. This causes an increase in power consumption of circuits, and subsequent difficulties in using a digital camera continuously for a long time. Moreover, this makes a circuit scale larger, resulting in an increase in costs.